Huawei has put China’s semiconductor ambitions back in the spotlight with a new chip design approach aimed at reducing reliance on restricted Western technology. The company introduced what it calls the Tau Scaling Law and a LogicFolding architecture, arguing that chip performance can improve not only by shrinking transistors, but also by speeding up data movement across devices, circuits and systems.

The target is ambitious. Huawei says the approach could help it reach transistor density comparable to a 1.4-nanometer process by 2031. That matters because U.S. restrictions continue to limit China’s access to advanced lithography tools, chip design software and Nvidia-class AI hardware. If the method proves scalable, it could give Chinese companies another path to improve AI chips without relying fully on EUV-driven process shrinks.

Still, this is not proof that Huawei has caught up with TSMC or Nvidia. China’s most advanced mass-produced chips are still generally seen around the 7-nanometer level, while TSMC is targeting 1.4-nanometer production earlier. For investors, the announcement is a signal of direction rather than a finished breakthrough: China is trying to turn chip sanctions into a systems-design challenge. The upside is strategic independence; the risk is that manufacturing bottlenecks remain hard to solve.